Well, [FONT=Arial, Arial, Helvetica]GBA ROMs are special chips that contain a standard ROM, address latches, and address counters all on one chip. Cart accesses can be either sequential or non-sequential. The first access to a random cart ROM location must be non-sequential. This type of access is done by putting the lower 16 bits of the ROM address on cart lines AD0-AD15 and setting /CS low to latch address lines A0-A15. Then /RD is strobed low to read 16 bits of data from that ROM location. (Data is valid on the rising edge of /RD.) The following sequential ROM location(s) can be read by again strobing /RD low. Sequential ROM access does not require doing another /CS high-to-low transitions because there are count up registers in the cart ROM chip that keep track of the next ROM location to read. Address increment occurs on the low-to-high edge of all /RD. In theory, you can read an entire GBA ROM with just one non-sequential read (address 0) and all of the other reads as sequential so address counters must be used on most address lines to exactly emulate a GBA ROM. However, you only need to use address latch / counters on A0-A15 in order to satisfy the GBA since A16-A23 are always accurate.
Now, with backup up there are three different types:
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SRAM (256KBit or 512Kbit) - Battery backed up static RAM. It can be up to 64K bytes but it's usually 32K bytes in size. It is located in the memory map from 0xe000000 to 0xe00ffff. (Examples of games that use 32K RAM backup: FZero, etc.). Newer games are using 64K bytes.
Flash ROM (512KBit or 1Mbit) - This is memory which can be 64K bytes or 128K bytes with bank switching. It is located in the memory map from 0xe000000 to 0xe00ffff. Reading Flash ROM is the same as reading SRAM; however, writing to Flash ROM is a different process due to the fact that Flash chips often have different modes of operation. Consult Sanyo & Atmel flash data sheets for more info. [/FONT] [FONT=Arial, Arial, Helvetica]This type of backup is emulated in nearly all available cartridges. Cart designers only have to implement the identify, the erase (in case of Sanyo based design) and the write command. Not a big problem inside an EPLD design :-) and it's enough to implement only one chip :-).[/FONT] [FONT=Arial, Arial, Helvetica] [/FONT]Some of the manufacturers guarantee a minimum of 10,000 rewrites per 1 sector so these devices have a limited life compared to SRAM. (Examples of games that use 64K Flash ROM backup: GT:Grand Touring Car Championship, Chu Chu Rocket, etc.) The Pokemon Ruby cartridge will use a 1Mbit flash chip.
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EEPROM (4KBit or 64KBit) - This uses the /CS, A23, and D0 of the cart bus and is a serial connection. It usually is found in 4kbit or 64kbit size, but because of it's serial configuration, it could theoretically be any size. The maximum useable ROM size is 128MBits when using this device. Some of the manufacturers guarantee a minimum of 100,000 rewrites per address so these devices have a limited life compared to SRAM. (Examples of games that use EEPROM backup: Mario Advance, Final Fight, Hot Potato).
SOURCE: https://www.ziegler.desaign.de/GBA/gba.htm
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[FONT=Arial, Arial, Helvetica] Hope this clears up any questions.
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